EDN

CMOS logic family brings robust ESD protection to battery-powered devices

CMOS reduces power consumption and board space by more than 30 percent San Jose, Calif.—Royal Philips Electronics today introduced its family of Advanced Ultra-low Power (AUP) CMOS logic, featuring ...
EDN

Matching ESD protection to process geometry

Advanced CMOS process technologies enable IC designers to deliver higher performing devices, but also increase the need for extra board-level ESD protection to ensure the reliability of the end ...
Design-Reuse

Selecting optimized ESD protection for CMOS image sensors

The market for CMOS image sensors (CIS) is projected to grow with a Compound annual growth rate (CAGR) of 7 to almost 9% in the next 5 years. According to researchers it will reach a total yearly ...
Design-Reuse

Tower Semiconductor licenses 20kV HBM ESD protection from Sarnoff

GISTEL, Belgium & MIGDAL HAEMEK, Israel -- July 11, 2007 -- Sarnoff Europe and Tower Semiconductor today announced that Tower Semiconductor has licensed Sarnoff Europe's TakeCharge® electrostatic ...
Business Wire

New Advanced SPICE Model for ESD Diodes Addresses Challenges in IC Design and Protection

AUSTIN, Texas--(BUSINESS WIRE)--The Silicon Integration Initiative Compact Model Coalition is proud to announce the release of the ASM-ESD diode model, a new electrostatic discharge compact modeling ...
Semiconductor Engineering

Ensuring ESD Protection Verification With Industry-Standard Checks

Electronic design automation (EDA) verification of electrostatic discharge (ESD) protection is a complex task. Different integrated circuit (IC) design companies use different ESD protection ...
Nature

Electrostatic Discharge Protection in Integrated Circuits

Electrostatic discharge (ESD) protection is an essential facet in the design and operation of modern integrated circuits (ICs). As electronic devices become increasingly miniaturised and complex, ...
Semiconductor Engineering

How Robust Is Your ESD Protection? Are You Sure?

Electrostatic discharge (ESD) protection is critical at advanced nodes to safeguard designs against effects intensified by shrinking transistor dimensions and oxide layer thicknesses. On the other ...
Electronics Weekly

OPEN Alliance: Get the right ESD protection placement

The sheer volume of automotive electronics in today’s cars is dramatically driving up the transmission requirements and data payload on automotive networks, writes Lukas Droemer of Nexperia. To take ...
Nanowerk

World's first vertically stacked gate-all-around Si nanowire CMOS transistors

(Nanowerk News) At this week’s IEEE IEDM conference, world-leading research and innovation hub for nano-electronics and digital technology, imec, reported for the first time the CMOS integration of ...
Electronics Weekly

Imec makes CMOS GAA nanowire mosfets

Imec has achieved the CMOS integration of vertically stacked gate-all-around (GAA) silicon nanowire MOSFETs. Key in the integration scheme is a dual-work-function metal gate enabling matched threshold ...