GitHub

Working with FPGA and VHDL

This repository contains my hands-on work and practical sessions (TPs) with FPGA and VHDL. As part of my learning process, I am documenting each practical session, using the ALTERA Cyclone V DE-1 SoC ...
GitHub

FPGA-Based-Electronic-Lock-System

Keypad Decoder: Implements a 16-key keypad matrix decoding algorithm. Lock Mechanism Simulation: Uses LEDs to indicate the lock's status (red for locked, green for unlocked). 7-Segment Display ...
IEEE

An FPGA-Accelerated Platform for Post-FEC BER Analysis of 200 Gb/s Wireline Systems

Abstract: As wireline communication links transition from 100 Gb/s to 200 Gb/s per lane, new and complex forward error correction (FEC) architectures have been ...
IEEE

The UART Demonstration Project

This chapter presents a universal asynchronous receiver/transmitter (UART) demonstration project, enabling serial communication between an FPGA and a computer. It begins by explaining the UART ...